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| 500kHz Step-Down DC/DC Converter POWER MANAGEMENT Description The SC2612E is a voltage mode switcher designed for low cost, "point of use" voltage conversion. SC2612E is available with fixed switching frequencies of 500kHz. The SC2612E has soft start and enable functions and is short circuit protected. The output of the switcher may be set anywhere between 0.8V and 75% of Vin. Short circuit protection is disabled during start-up to allow the output capacitors time to fully charge. SC2612E Features u u u u u u Operating frequency of 500kHz Input supply of 4.5V to 15V 0.5A Drive current for up to 10A output Output voltages down to 0.8V Overcurrent protection and soft start SO-8 package Applications u Graphics IC Power supplies u Embedded, low cost, high efficiency converters Typical Application Circuit 12V IN 5V IN R1 C10 C1 C2 U2 2 7 8 C5 C7 C9 R9 R10 4 VCC COMP SS/EN GND BST DH DL FB 6 5 3 1 Q3 C3 R6 R2 R3 Q2 L1 1.5V OUT SC2612E Revision: October 12, 2004 1 www.semtech.com SC2612E POWER MANAGEMENT Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter VCC Supply Voltage Boost Pin Voltage DL to GND , DH to GND (1) (1) Symbol VCC VBST VDLO, VDHI VDH_PULSE VDL_PULSE TA TJ TSTG TLEAD (2) Maximum 18 20 -1 to +20 -4.5 -4.5 0 to 70 125 -65 to 150 300 113 42 2 Units V V V V V C C C C C/W C/W kV DH to GND Negative Pulse (tpulse < 10ns) DL to GND Negative Pulse (tpulse < 20ns) Operating Ambient Temperature Range Operating Junction Temperature Storage Temperature Lead Temperature (Soldering) 10s Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case ESD Rating (Human Body Model) JA JC ESD Electrical Characteristics Unless specified: VCC = 4.5V to 12V; VFB = VO; BST = Vcc+5V; TA = 0 to 70C Parameter VCC Supply Voltage VCC Quiescent Current BST Supply Voltage BST Quiescent Current VCC Under Voltage Lockout BST Under Voltage Lockout Output Voltage Overcurrent trip voltage Load Regulation Line Regulation Oscillator Frequency Oscillator Max Duty Cycle SS/EN Shutdown Voltage SS/EN Charge current Peak DH Sink/Source Current Peak DL Sink/Source Current Symbol VCC IQVCC VBST IQBST UVVCC UVBST VOS VITS Conditions Min 4.5 Typ Max 15 Units V mA V mA V V mV V % % VCC = 5.0V, VBST = 12.0V, SS/EN = 0V 4.5 VCC = 5.0V, VBST = 12.0V, SS/EN = 0V 3.8 3.15 IO = 10mA; VFB = VOS, TA = 25C IO = 0.2A to 4A 792 0.4 5 10 18 5 4.15 3.5 800 4.5 3.85 808 0.7 1 0.5 fOSC MAX VSS ISS Vss = 0.8V BST - DH = 4.5V, BST - DL = 4.5V, DH - GND = 3.3V DH - GND = 1.5V DL - GND = 3.3V DL - GND = 1.5V 400 80 0.3 500 600 kHz % 0.8 25 V A A mA A mA 0.5 50 0.5 50 2004 Semtech Corp. 2 www.semtech.com SC2612E POWER MANAGEMENT Electrical Characteristics Unless specified: VCC = 4.5V to 12V; VFB = VO; BST = Vcc+5V; TA = 0 to 70C Parameter Error Amplifier Transconductance Error Amplifier Gain (3) Error Amplifier Source/Sink Current Modulator Gain (3) Dead Time (3) Symbol Conditions Min Typ 0.8 Max Units mS dB A dB ns gm A EA AM RCOMP = open V C C = 5V 45 60 19 50 Notes: (1) See Gate Resistor selection recommendations. (2) 1square inch of FR4, double sided, 1oz. minimum copper weight. (3) Guaranteed by design, not tested in production. 2004 Semtech Corp. 3 www.semtech.com SC2612E POWER MANAGEMENT Pin Configuration TOP VIEW FB VCC DL GND 1 2 3 4 8 7 6 5 SS/EN COMP BST DH Ordering Information Part Numbers (1) SC2612ESTRT (2) Frequency 500kHz P ackag e SO-8 Note: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. (SO-8) Pin Descriptions Pin # 1 2 3 4 5 6 7 8 Pin Name FB VC C DL GND DH BST COMP SS/EN Switcher section feeedback input. Chip Supply Input Voltage. Switcher Low side FET drive output. Analog and Power Ground, connect directly to ground plane, see layout guidelines. Switcher High side FET drive output. Supply voltage for FET drives. Output of the Switcher section voltage error amplifier. Soft start and enable pin, controls the switcher output voltage ramp rate. Pin Function Block Diagram VCC VREF UVLO + UVLO & REF LEVEL SHIFT AND HIGH SIDE DRIVE BST DH SHDN + R Q SHOOT -T HRU CONT RO L FB COMP SS/EN - + S VREF 25uA OSCILLAT OR + + SSOVER R Q S SYNCHRONOUS MOSFET DRIVE DL GND 2004 Semtech Corp. 4 www.semtech.com SC2612E POWER MANAGEMENT Theory of Operation The SC2612E is a step down DC/DC controller designed for minimum cost and size without sacrificing accuracy and protection. Overcurrent protection is implemented by a simple undervoltage detection scheme and is disabled until soft start has been completed to eliminate false trips due to output capacitor charging. The SS/EN pin is held low, as are the DH and DL pins, until the undervoltage lockout points are exceeded. Once the VCC and BST pins both rise above their undervoltage lockout points, the SS capacitor begins to charge, controlling the duty cycle of the switcher, and therefore slowly ramping up the switcher output voltage. Once the SS capacitor is charged, the current limit circuitry is enabled. If a short circuit is applied , the output will be pulled down below it's trip point and shut down. The device may be restarted by either cycling power, or momentarily pulling SS/EN low. Component Selection OUTPUT INDUCTOR - A good starting point for output filter component selection is to choose an inductor value that will give an inductor ripple current of approximately 20% of max. output current. Inductor ripple current is given by:ae Vo VO x c1 - O / c V/ IN o e = L x fOSC IL RIPPLE So choose inductor value from:ae Vo 5 x VO x c1 - O / c V/ IN o e L= IO x fOSC CAPACITOR(S) OUTPUT CAPACITOR(S) - The output capacitors should be selected to meet output ripple and transient response criteria. Output ripple voltage is caused by the inductor ripple current flowing in the output capacitor's ESR (There is also a component due to the inductor ripple current charging and discharging the output capacitor itself, but this component is usually small and can often be ignored). Given a maximum output voltage ripple requirement, ESR is given by:ae Vo VO x VRIPPLE x c1 - O / c V/ IN o e < L x fOSC RESR Output voltage transient excursions are a function of load current transient levels, input and output voltages and inductor and capacitor values. Capacitance and RESR values to meet a required transient condition can be calculated from:RESR < C> VT IT 2 L x IT 2 x VT x VA where VA = VIN - VO for negative transients (load application) and VA = VO for positive transients (load release) values for positive and negative transients must be calculated seperately and the worst case value chosen. For Capacitor values, the calculated value should be doubled to allow for duty cycle limitation and voltage drop issues. 2004 Semtech Corp. 5 www.semtech.com SC2612E POWER MANAGEMENT COMPENSATION COMPENSATION COMPONENTS - Once the filter components have been determined, the compensation components can be calculated. The goal of compensation is to modify the frequency response characteristics of the error amplifier to ensure that the closed loop feedback system has the highest gain and bandwidth possible while maintaining stability. A simplified stability criteria states that the open loop gain of the converter should fall through 0dB at 20dB/ decade at a frequency no higher than 20-25% of the switching frequency. This objective is most simply met by generating asymptotic bode plots of the small signal response of the various sections of the converter. Calculate the filter double pole frequency (Fp(lc)) Fp(lc ) = 1 2p LCo 1 2p x Co x Re sr and calculate ESR Zero frequency (Fz(esr)) Fz( esr ) = Choose an open loop crossover frequency (Fco) no higher than 20% of the switching frequency (Fs). The proximity of Fz(esr) to the crossover frequency Fco determines the type of compensation required, if Fz(esr)>Fco/4, use type 3 compensation, otherwise use type 2. Type 1 compensation is not appropriate and is not discussed here. Type 2 Example As an example of type 2 compensation, we will use the Evaluation board schematic. SC2612E AND FETS REF FB + EA - MODULAT OR L OUT Ra REF + EA OUT 3.3uH VOUT 6.98k 3000uF Cs Cp 22mOhm Rs 8.06k MODULAT OR VOUT SC2612E AND FETS Vin=5V COMP Zf Co Zs Zp Resr FB Rb COMP It is convenient to split the converter into two sections, the Error amp and compensation components being one section and the Modulator, output filter and divider being the other. First calculate the DC Filter+Modulator+Divider gain The DC filter gain is always 0dB, the Modulator gain is 19dB at 5V in and is proportional to Vin, so modulator gain at any input voltage is. aeV o GMOD = 19 + 20 x Logc IN / e5o The total Filter+Modulator+Divider DC Gain is 8.06 ae5o ae o GFMD = 19 + 20 x Logc / + 20 x Logc / = 13.6dB e5o e 6.98 + 8.06 o This is drawn as the line A-B in Fig2 Fp(lc ) = 1 1 = 1.6kHz 2p LCo 2p 3.3 x 10 -6 x 3000 x 10 -6 1 = 2.4kHz 2p x 3000 x 10 - 6 x 22 x 10 -3 the divider gain is given by ae R8 G DIV = 20 x Log c cR +R e5 8 o / / o This is point B in Fig2. Fz(esr ) = So the total Filter+Modulator+Divider DC Gain is ae RB o aeV o GFMD = 19 + 20 x Logc IN / + 20 x Logc / cR + R / e5o Bo eA This is point C in Fig2., the line joining B-C slopes at 40dB/decade, the line joining C-D slopes at -20dB/decade. For 500kHz switching frequency, crossover is designed for 100kHz. Since Fz(esr)< 2004 Semtech Corp. SC2612E POWER MANAGEMENT Having plotted the line ABCD, and confirmed the type of compensation necessary, compensation component values can be determined. At Fco, the line ABCD shows a gain of -27.5dB and a slope of -20dB/decade. In order for the total open loop gain to be 0dB with a -20dB/decade slope at this frequency, the compensated error amp gain at Fco must be +27.5dB with a 0dB slope. This is the line FG on the plot below. Since open loop DC gain should be as high as possible to minimize errors, a zero is placed at F and to minimize high frequency gain and switching interference a pole is placed at G. The zero at F should be no higher than Fco/4 and the pole at G no lower than 4*Fco. The equations to set the gain and the pole and zero locations are: A 10 20 Rs = where A = gain at Fco (in dB) gm Cs = 1 2p x Fz1 x Rs Cp = 1 2p x Fp1 x Rs 27.5 For this example, this results in the following values. 10 20 Rs = = 29.6kW 30kW 0.8 Cs Cp 100 1 = 0.22nF 6 x 25 x 103 x 30 x 10 3 1 = 14pF (unecessar y due to EA rolloff ) 6 x 400 x 10 3 x 30 x 10 3 80 E 60 Compensated Error Amp gain F G H Fz1 C Fp1 Total open loop gain 40 Gain (dB) 20 A Fp(lc) B 0 Fz(esr) -20 Filter+modulator +divider gain -40 Fco D -60 100.0E+0 1.0E+3 10.0E+3 Frequency (Hz) 100.0E+3 1.0E+6 Fig2: Type 2 Error Amplifier Compensation 2004 Semtech Corp. 7 www.semtech.com SC2612E POWER MANAGEMENT Layout Guidelines Careful attention to layout requirements are necessary for successful implementation of the SC2612E PWM controller. High currents switching at high frequency are present in the application and their effect on ground plane voltage differentials must be understood and minimized. 1). The high power parts of the circuit should be laid out first. A ground plane should be used, the number and position of ground plane interruptions should be such as to not unnecessarily compromise ground plane integrity. Isolated or semi-isolated areas of the ground plane may be deliberately introduced to constrain ground currents to particular areas, for example the input capacitor and bottom FET ground. 2). The loop formed by the Input Capacitor(s) (Cin), the Top FET (Q1) and the Bottom FET (Q2) must be kept as small as possible. This loop contains all the high current, fast transition switching. Connections should be as wide and as short as possible to minimize loop inductance. Minimizing this loop area will a) reduce EMI, b) lower ground injection currents, resulting in electrically "cleaner" grounds for the rest of the system and c) minimize source ringing, resulting in more reliable gate switching signals. 3). The connection between the junction of Q1, Q2 and the output inductor should be a wide trace or copper region. It should be as short as practical. Since this connection has fast voltage transitions, keeping this connection short will minimize EMI. The connection between the output inductor and the output capacitors should be a wide trace or copper area, there are no fast voltage or current transitions in this connection and length is not so important, however adding unnecessary impedance will reduce efficiency. 12V IN Vin 10 U1 2 7 8 0.1uF 4 VCC COMP SS/EN GND BST DH DL FB 3 1 Q2 Cin L Cout Vout 6 5 Q1 10uF SC2612E GND 2004 Semtech Corp. 8 www.semtech.com SC2612E POWER MANAGEMENT Layout Guidelines (Cont.) 4) The Output Capacitor(s) (Cout) should be located as close to the load as possible, fast transient load currents are supplied by Cout only, and connections between Cout and the load must be short, wide copper areas to minimize inductance and resistance. 5) The SC2612E is best placed over a quiet ground plane area, avoid pulse currents in the Cin, Q1, Q2 loop flowing in this area. PGNDH and PGNDL should be returned to the ground plane close to the package. The AGND pin should be connected to the ground side of (one of) the output capacitor(s). If this is not possible, the AGND pin may be connected to the ground path between the Output Capacitor(s) and the Cin, Q1, Q2 loop. Under no circumstances should AGND be returned to a ground inside the Cin, Q1, Q2 loop. 6) Vcc for the SC2612E should be supplied from the 5V supply through a 10 resistor, the Vcc pin should be decoupled directly to AGND by a 0.1F ceramic capacitor, trace lengths should be as short as possible. Vin Currents in Power Section + Vout + 2004 Semtech Corp. 9 www.semtech.com SC2612E POWER MANAGEMENT Typical Characteristics 100% VBST = 12V for VIN = 5V VBST = 18V for VIN = 12V VIN = 5V Efficiency (%) 90% 12V 85% VO (V) 1.496 1.498 1.500 IO = 2.00A; VBST = 18V 95% 1.494 80% 1.492 75% 70% 0 2 4 6 8 10 Output Current (A) 1.490 4 5 6 7 8 VIN (V) 9 10 11 12 Typical Efficiency 100% Typical Line Regulation 0.0% VBST = 12V for VIN = 5V VBST = 18V for VIN = 12V VIN = 12V Duty Cycle (%) (No Feedback) 80% -0.5% 60% VO (V) -1.0% 5V 40% -1.5% 20% 0% 0.0 0.2 0.4 0.6 SS/EN Voltage (V) 0.8 1.0 1.2 -2.0% 0 2 4 IO (A) 6 8 10 SS/EN Control of duty cycle Typical Load Regulation 2004 Semtech Corp. 10 www.semtech.com SC2612E POWER MANAGEMENT Outline Drawing - SOIC-8 A N 2X E/2 E1 1 ccc C 2X N/2 TIPS 2 e/2 B D aaa C SEATING PLANE A2 A C bxN bbb A1 C A-B D GAGE PLANE 0.25 SEE DETAIL SIDE VIEW NOTES: 1. 2. 3. 4. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -HDIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. REFERENCE JEDEC STD MS-012, VARIATION AA. e D DIM A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc DIMENSIONS MILLIMETERS INCHES MIN NOM MAX MIN NOM MAX .069 .053 .010 .004 .065 .049 .012 .020 .010 .007 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 8 8 0 .004 .010 .008 1.75 1.35 0.25 0.10 1.65 1.25 0.31 0.51 0.25 0.17 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 8 0 8 0.10 0.25 0.20 E h h H c A L (L1) DETAIL 01 A Land Pattern - SOIC-8 X DIM (C) G Z C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. REFERENCE IPC-SM-782A, RLP NO. 300A. 2. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Rd., Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2004 Semtech Corp. 11 www.semtech.com |
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